CWE-1326 Base Brouillon

Missing Immutable Root of Trust in Hardware

This vulnerability occurs when a hardware chip lacks a permanent, unchangeable root of trust. Without this immutable foundation, attackers can bypass secure boot protections and run unauthorized or…

Définition

What is CWE-1326?

This vulnerability occurs when a hardware chip lacks a permanent, unchangeable root of trust. Without this immutable foundation, attackers can bypass secure boot protections and run unauthorized or malicious code during the system startup process.
Secure boot in a System-on-Chip (SoC) relies on verifying signed boot code using a trusted key. The chip must also check critical hardware settings, like a 'secure boot enabled' fuse. Together, this code and configuration data form the Root of Trust (RoT), which is the absolute starting point for all security. If an attacker can modify this RoT, they can compromise the entire boot chain. To prevent this, the RoT must be stored in immutable memory, such as locked fuses or one-time-programmable (OTP) memory, after initial provisioning. This ensures the foundational security data cannot be rewritten. It's important to distinguish this from components like ROM, which should support secure, authenticated update mechanisms for authorized patches in the field, while the core RoT itself remains permanently fixed.
Impact réel

Real-world CVEs caused by CWE-1326

Aucune référence CVE publique n'est liée à ce CWE dans le catalogue MITRE pour le moment.

Comment les attaquants l'exploitent

Parcours de l'attaquant étape par étape

  1. 1

    The RoT is stored in memory. This memory can be modified by an adversary. For example, if an SoC implements "Secure Boot" by storing the boot code in an off-chip/on-chip flash, the contents of the flash can be modified by using a flash programmer. Similarly, if the boot code is stored in ROM (Read-Only Memory) but the public key or the hash of the public key (used to enable "Secure Boot") is stored in Flash or a memory that is susceptible to modifications or writes, the implementation is vulnerable.

  2. 2

    In general, if the boot code, key materials and data that enable "Secure Boot" are all mutable, the implementation is vulnerable.

  3. 3

    Good architecture defines RoT as immutable in hardware. One of the best ways to achieve immutability is to store boot code, public key or hash of the public key and other relevant data in Read-Only Memory (ROM) or One-Time Programmable (OTP) memory that prevents further programming or writes.

  4. 4

    The example code below is a snippet from the bootrom of the HACK@DAC'19 buggy OpenPiton SoC [REF-1348]. The contents of the bootrom are critical in implementing the hardware root of trust.

  5. 5

    It performs security-critical functions such as defining the system's device tree, validating the hardware cryptographic accelerators in the system, etc. Hence, write access to bootrom should be strictly limited to authorized users or removed completely so that bootrom is immutable. In this example (see the vulnerable code source), the boot instructions are stored in bootrom memory, mem. This memory can be read using the read address, addr_i, but write access should be restricted or removed.

Exemple de code vulnérable

Vulnerable Verilog

It performs security-critical functions such as defining the system's device tree, validating the hardware cryptographic accelerators in the system, etc. Hence, write access to bootrom should be strictly limited to authorized users or removed completely so that bootrom is immutable. In this example (see the vulnerable code source), the boot instructions are stored in bootrom memory, mem. This memory can be read using the read address, addr_i, but write access should be restricted or removed.

Vulnérable Verilog
...
  	always_ff @(posedge clk_i) begin
  		if (req_i) begin
  			if (!we_i) begin
  				raddr_q <= addr_i[$clog2(RomSize)-1+3:3];
  			 end else begin 
```
mem[addr_i[$clog2(RomSize)-1+3:3]] <= wdata_i;**  end end end ...

```
   // this prevents spurious Xes from propagating into the speculative fetch stage of the core 
  assign rdata_o = (raddr_q < RomSize) ? mem[raddr_q] : '0;
   ...
Exemple de code sécurisé

Secure Verilog

To mitigate this issue, remove the write access to bootrom memory. [REF-1349]

Sécurisé Verilog
...
  	always_ff @(posedge clk_i) begin
```
if (req_i) begin** 
  		
  		```
  			raddr_q <= addr_i[$clog2(RomSize)-1+3:3];
  		 end
  	 end
   ...
   // this prevents spurious Xes from propagating into the speculative fetch stage of the core 
  assign rdata_o = (raddr_q < RomSize) ? mem[raddr_q] : '0;
   ...
What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.
Liste de contrôle de prévention

How to prevent CWE-1326

  • Architecture and Design When architecting the system, the RoT should be designated for storage in a memory that does not allow further programming/writes.
  • Implementation During implementation and test, the RoT memory location should be demonstrated to not allow further programming/writes.
Signaux de détection

How to detect CWE-1326

Automated Dynamic Analysis High

Automated testing can verify that RoT components are immutable.

Architecture or Design Review High

Root of trust elements and memory should be part of architecture and design reviews.

Correction automatique Plexicus

Plexicus détecte automatiquement CWE-1326 et ouvre une PR de correction en moins de 60 secondes.

Codex Remedium analyse chaque commit, identifie cette faiblesse précise et livre une pull request prête à être relue avec le correctif. Pas de tickets. Pas de transferts.

Questions fréquentes

Frequently asked questions

Qu'est-ce que CWE-1326 ?

This vulnerability occurs when a hardware chip lacks a permanent, unchangeable root of trust. Without this immutable foundation, attackers can bypass secure boot protections and run unauthorized or malicious code during the system startup process.

Quelle est la gravité de CWE-1326 ?

MITRE n'a pas publié de note de probabilité d'exploitation pour cette faiblesse. Traitez-la comme un impact moyen jusqu'à ce que votre modèle de menace prouve le contraire.

Quels langages ou plateformes sont affectés par CWE-1326 ?

MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, Security Hardware, Not Technology-Specific.

Comment puis-je prévenir CWE-1326 ?

When architecting the system, the RoT should be designated for storage in a memory that does not allow further programming/writes. During implementation and test, the RoT memory location should be demonstrated to not allow further programming/writes.

Comment Plexicus détecte et corrige CWE-1326 ?

Le moteur SAST de Plexicus reconnaît la signature de flux de données de CWE-1326 à chaque commit. Lorsqu'une correspondance est trouvée, notre agent Codex Remedium ouvre une PR de correction avec le code corrigé, les tests et un résumé d'une ligne pour le relecteur.

Où puis-je en savoir plus sur CWE-1326 ?

MITRE publie la définition canonique à https://cwe.mitre.org/data/definitions/1326.html. Vous pouvez également consulter la documentation OWASP et NIST pour des conseils adjacents.

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