Non-Transparent Sharing of Microarchitectural Resources

Modern CPUs use performance-boosting techniques like out-of-order execution, speculation, and caching. The problem is that the hardware implementation of these features often shares physical resources between apps, virtual machines, or security domains in ways not documented in the architecture. Since this sharing is invisible to software, it creates hidden communication channels that malicious programs can exploit to steal sensitive information from other contexts. Attackers have leveraged shared resources like CPU caches, branch prediction buffers, and load-store queues to build these covert channels. Speculative execution further amplifies the risk by giving attackers more precise control over what data gets leaked. Without clear documentation on how these microarchitectural resources are shared, it's nearly impossible for developers and system designers to guarantee protection against such side-channel attacks.