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Missing Ability to Patch ROM Code

Draft Base
Structure: Simple
Description

A system or System-on-Chip (SoC) lacks a mechanism to update its initial boot code stored in Read-Only Memory (ROM), permanently exposing devices to unfixable security vulnerabilities.

Extended Description

Many secure systems start by running foundational code from an immutable ROM, which establishes a hardware Root of Trust. Since this ROM code is permanently etched into the chip during manufacturing, any security flaws discovered after the device ships become permanent. This creates a critical, unchangeable weakness in every deployed unit. Without a built-in patching capability for this ROM stage, the entire system remains vulnerable to exploitation. Attackers can target these unfixable flaws to compromise the boot process, potentially bypassing all subsequent security layers and taking full control of the SoC.
Common Consequences 1
Scope: Other

Impact: Varies by ContextReduce Maintainability

When the system is unable to be patched, it can be left in a vulnerable state.
Potential Mitigations 2
Phase: Architecture and DesignImplementation
Secure patch support to allow ROM code to be patched on the next boot.

Effectiveness: Moderate

Phase: Architecture and DesignImplementation
Support patches that can be programmed in-field or during manufacturing through hardware fuses. This feature can be used for limited patching of devices after shipping, or for the next batch of silicon devices manufactured, without changing the full device ROM.

Effectiveness: Moderate
Demonstrative Examples 2

ID : DX-146

A System-on-Chip (SOC) implements a Root-of-Trust (RoT) in ROM to boot secure code. However, at times this ROM code might have security vulnerabilities and need to be patched. Since ROM is immutable, it can be impossible to patch.
ROM does not have built-in application-programming interfaces (APIs) to patch if the code is vulnerable. Implement mechanisms to patch the vulnerable ROM code.
The example code is taken from the SoC peripheral wrapper inside the buggy OpenPiton SoC of HACK@DAC'21. The wrapper is used for connecting the communications between SoC peripherals, such as crypto-engines, direct memory access (DMA), reset controllers, JTAG, etc. The secure implementation of the SoC wrapper should allow users to boot from a ROM for Linux (i_bootrom_linux) or from a patchable ROM (i_bootrom_patch) if the Linux bootrom has security or functional issues.The example code is taken from the SoC peripheral wrapper inside the buggy OpenPiton SoC of HACK@DAC'21. The wrapper is used for connecting the communications between SoC peripherals, such as crypto-engines, direct memory access (DMA), reset controllers, JTAG, etc. The secure implementation of the SoC wrapper should allow users to boot from a ROM for Linux (i_bootrom_linux) or from a patchable ROM (i_bootrom_patch) if the Linux bootrom has security or functional issues.

Code Example:

Bad
Verilog

...

verilog

assign rom_rdata = (ariane_boot_sel_i) ? rom_rdata_linux : rom_rdata_linux;** ...

The above implementation causes the ROM data to be hardcoded for the linux system (rom_rdata_linux) regardless of the value of ariane_boot_sel_i. Therefore, the data (rom_rdata_patch) from the patchable ROM code is never used [REF-1396]. This weakness disables the ROM's ability to be patched. If attackers uncover security vulnerabilities in the ROM, the users must replace the entire device. Otherwise, the weakness exposes the system to a vulnerable state forever. A fix to this issue is to enable rom_rdata to be selected from the patchable rom (rom_rdata_patch) [REF-1397].

Code Example:

Good
Verilog

...

verilog

assign rom_rdata = (ariane_boot_sel_i) ? rom_rdata_patch : rom_rdata_linux;** ...
References 2
riscv_peripherals.sv line 534
2021
https://github.com/HACK-EVENT/hackatdac21/blob/75e5c0700b5a02e744f006fe8a09ff3c2ccdd32d/piton/design/chip/tile/ariane/openpiton/riscv_peripherals.sv#L534(2024-02-12)
ID: REF-1396
Fix for riscv_peripherals.sv line 534
2021
https://github.com/HACK-EVENT/hackatdac21/blob/cwe_1310_riscv_peripheral/piton/design/chip/tile/ariane/openpiton/riscv_peripherals.sv#L534(2024-02-12)
ID: REF-1397
Applicable Platforms
Languages:
Not Language-Specific : Undetermined
Technologies:
System on Chip : Undetermined
Modes of Introduction
Architecture and Design
Implementation
Integration
Manufacturing
Related Attack Patterns
Related Weaknesses
ChildOf: Reliance on Component That is Not Updateable (CWE-1329)