CWE-1342: Information Exposure through Microarchitectural State after Transient Execution

Definition

What is CWE-1342?

This vulnerability occurs when a CPU fails to completely erase temporary data traces left behind by speculative execution or error recovery processes. These lingering microarchitectural hints can be analyzed through side-channels to leak sensitive information.

Modern CPUs use techniques like speculative execution and microcode assists to boost performance. When these operations are canceled or encounter errors, the processor should fully clean up. However, if remnants of these transient computations persist in internal buffers (like load/store queues), they create a measurable change in the chip's hidden state. An attacker can then use timing or other side-channel attacks to infer protected data, such as secrets from other processes or virtual machines. Successful exploitation typically requires three conditions: first, vulnerable code must speculatively access sensitive information, leaving microarchitectural traces. Second, the attacker must be able to trigger the specific CPU exceptions or mis-speculations that create these traces. Finally, the attacker needs a method to observe the state change, often by analyzing cache timing or other hardware resource contention, to slowly reconstruct the leaked data.

Real-world impact

Real-world CVEs caused by CWE-1342

CVE-2020-0551

Load value injection in some processors utilizing speculative execution may allow an authenticated user to enable information disclosure via a side-channel with local access.

How attackers exploit it

Step-by-step attacker path

1
Faulting loads in a victim domain may trigger incorrect transient forwarding, which leaves secret-dependent traces in the microarchitectural state. Consider this example from [REF-1203].
2
Consider the code gadget:
3
A processor with this weakness will store the value of untrusted_arg (which may be provided by an attacker) to the stack, which is trusted memory. Additionally, this store operation will save this value in some microarchitectural buffer, e.g. the store queue. In this code gadget, trusted_ptr is dereferenced while the attacker forces a page fault. The faulting load causes the processor to mis-speculate by forwarding untrusted_arg as the (speculative) load result. The processor then uses untrusted_arg for the pointer dereference. After the fault has been handled and the load has been re-issued with the correct argument, secret-dependent information stored at the address of trusted_ptr remains in microarchitectural state and can be extracted by an attacker using a code gadget.

Vulnerable code example

Vulnerable C

Consider the code gadget:

Vulnerable C

void call_victim(size_t untrusted_arg) {
  	 *arg_copy = untrusted_arg;
  	 array[**trusted_ptr * 4096];
   }

Secure code example

Secure pseudo

// Validate, sanitize, or use a safe API before reaching the sink.
function handleRequest(input) {
  const safe = validateAndEscape(input);
  return executeWithGuards(safe);
}

What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.

Prevention checklist

How to prevent CWE-1342

Architecture and Design / Requirements Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.
Build and Compilation Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.

Detection signals

How to detect CWE-1342

SAST High

Run static analysis (SAST) on the codebase looking for the unsafe pattern in the data flow.

DAST Moderate

Run dynamic application security testing against the live endpoint.

Runtime Moderate

Watch runtime logs for unusual exception traces, malformed input, or authorization bypass attempts.

Code review Moderate

Code review: flag any new code that handles input from this surface without using the validated framework helpers.

CWE-1342

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Frequently asked questions

What is CWE-1342?

This vulnerability occurs when a CPU fails to completely erase temporary data traces left behind by speculative execution or error recovery processes. These lingering microarchitectural hints can be analyzed through side-channels to leak sensitive information.

How serious is CWE-1342?

MITRE has not published a likelihood-of-exploit rating for this weakness. Treat it as medium-impact until your threat model proves otherwise.

What languages or platforms are affected by CWE-1342?

MITRE lists the following affected platforms: Not OS-Specific, Workstation, x86, ARM, Other, Not Technology-Specific, System on Chip.

How can I prevent CWE-1342?

Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level. Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.

How does Plexicus detect and fix CWE-1342?

Plexicus's SAST engine matches the data-flow signature for CWE-1342 on every commit. When a match is found, our Codex Remedium agent opens a fix PR with the corrected code, tests, and a one-line summary for the reviewer.

Where can I learn more about CWE-1342?

MITRE publishes the canonical definition at https://cwe.mitre.org/data/definitions/1342.html. You can also reference OWASP and NIST documentation for adjacent guidance.

Related weaknesses

Weaknesses related to CWE-1342

CWE-226 Parent

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Information Exposure through Microarchitectural State after Transient Execution

What is CWE-1342?

Real-world CVEs caused by CWE-1342

Step-by-step attacker path

Vulnerable C

Secure pseudo

How to prevent CWE-1342

How to detect CWE-1342

Don't catalog this weakness. Prove it's reachable.

Frequently asked questions

Weaknesses related to CWE-1342

Sensitive Information in Resource Not Removed Before Reuse

Improper Zeroization of Hardware Register

Sensitive Information Uncleared Before Debug/Power State Transition

Insufficient or Incomplete Data Removal within Hardware Component

Improper Clearing of Heap Memory Before Release ('Heap Inspection')

Further reading

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Sample evidence handover

Server-Side Request Forgery in `webhooks/receiver`