CWE-1316 Base Brouillon

Fabric-Address Map Allows Programming of Unwarranted Overlaps of Protected and Unprotected Ranges

This vulnerability occurs when a hardware fabric's address map incorrectly allows protected and unprotected memory regions to overlap. Attackers can exploit this overlap to bypass security controls…

Définition

What is CWE-1316?

In system-on-chip (SoC) designs, the address map defines protected and unprotected ranges for memory and memory-mapped I/O (MMIO). These ranges, often set by base and size registers, are meant to enforce isolation—keeping sensitive data in access-controlled areas. However, if these ranges are programmed to overlap, either accidentally through a design error or intentionally via malicious software in dynamically reconfigurable systems, the hardware's access control logic can become confused. When a protected range overlaps with an unprotected one, an attacker can craft transactions targeting the overlapping address space. Since the unprotected path provides a valid route, the hardware may fail to apply the proper security checks, allowing unauthorized access. This breach violates the core security principle of least privilege, as the overlap creates a backdoor that circumvents the intended protection mechanisms.

Impact réel

Real-world CVEs caused by CWE-1316

CVE-2009-4419

Attacker can modify MCHBAR register to overlap with an attacker-controlled region, which modification prevents the SENTER instruction from properly applying VT-d protection while a Measured Launch Environment is being launched.

Comment les attaquants l'exploitent

Parcours de l'attaquant étape par étape

1
An on-chip fabric supports a 64KB address space that is memory-mapped. The fabric has two range registers that support creation of two protected ranges with specific size constraints--4KB, 8KB, 16KB or 32KB. Assets that belong to user A require 4KB, and those of user B require 20KB. Registers and other assets that are not security-sensitive require 40KB. One range register is configured to program 4KB to protect user A's assets. Since a 20KB range cannot be created with the given size constraints, the range register for user B's assets is configured as 32KB. The rest of the address space is left as open. As a result, some part of untrusted and open-address space overlaps with user B range.
2
The fabric does not support least privilege, and an attacker can send a transaction to the overlapping region to tamper with user B data.
3
Since range B only requires 20KB but is allotted 32KB, there is 12KB of reserved space. Overlapping this region of user B data, where there are no assets, with the untrusted space will prevent an attacker from tampering with user B data.

Exemple de code vulnérable

Vulnerable pseudo

MITRE n'a pas publié d'exemple de code pour ce CWE. Le motif ci-dessous est illustratif — voir Ressources pour les références canoniques.

Vulnérable pseudo

// Example pattern — see MITRE for the canonical references.
function handleRequest(input) {
  // Untrusted input flows directly into the sensitive sink.
  return executeUnsafe(input);
}

Exemple de code sécurisé

Secure pseudo

Sécurisé pseudo

// Validate, sanitize, or use a safe API before reaching the sink.
function handleRequest(input) {
  const safe = validateAndEscape(input);
  return executeWithGuards(safe);
}

What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.

Liste de contrôle de prévention

How to prevent CWE-1316

Architecture and Design When architecting the address map of the chip, ensure that protected and unprotected ranges are isolated and do not overlap. When designing, ensure that ranges hardcoded in Register-Transfer Level (RTL) do not overlap.
Implementation Ranges configured by firmware should not overlap. If overlaps are mandatory because of constraints such as a limited number of registers, then ensure that no assets are present in the overlapped portion.
Testing Validate mitigation actions with robust testing.

Signaux de détection

How to detect CWE-1316

Automated Dynamic Analysis High

Review address map in specification to see if there are any overlapping ranges.

Manual Static Analysis High

Negative testing of access control on overlapped ranges.

Correction automatique Plexicus

Plexicus détecte automatiquement CWE-1316 et ouvre une PR de correction en moins de 60 secondes.

Codex Remedium analyse chaque commit, identifie cette faiblesse précise et livre une pull request prête à être relue avec le correctif. Pas de tickets. Pas de transferts.

Obtenir une démo Essayer Plexicus gratuitement

Questions fréquentes

Frequently asked questions

Qu'est-ce que CWE-1316 ?

Quelle est la gravité de CWE-1316 ?

MITRE n'a pas publié de note de probabilité d'exploitation pour cette faiblesse. Traitez-la comme un impact moyen jusqu'à ce que votre modèle de menace prouve le contraire.

Quels langages ou plateformes sont affectés par CWE-1316 ?

MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, Bus/Interface Hardware, Not Technology-Specific.

Comment puis-je prévenir CWE-1316 ?

When architecting the address map of the chip, ensure that protected and unprotected ranges are isolated and do not overlap. When designing, ensure that ranges hardcoded in Register-Transfer Level (RTL) do not overlap. Ranges configured by firmware should not overlap. If overlaps are mandatory because of constraints such as a limited number of registers, then ensure that no assets are present in the overlapped portion.

Comment Plexicus détecte et corrige CWE-1316 ?

Le moteur SAST de Plexicus reconnaît la signature de flux de données de CWE-1316 à chaque commit. Lorsqu'une correspondance est trouvée, notre agent Codex Remedium ouvre une PR de correction avec le code corrigé, les tests et un résumé d'une ligne pour le relecteur.

Où puis-je en savoir plus sur CWE-1316 ?

MITRE publie la définition canonique à https://cwe.mitre.org/data/definitions/1316.html. Vous pouvez également consulter la documentation OWASP et NIST pour des conseils adjacents.

Faiblesses associées

Weaknesses related to CWE-1316

CWE-284 Parent

Improper Access Control

The software fails to properly limit who can access a resource, allowing unauthorized users or systems to interact with it.

CWE-1191 Frère

On-Chip Debug and Test Interface With Improper Access Control

This vulnerability occurs when a hardware chip's debug or test interface (like JTAG) lacks proper access controls. Without correct…

CWE-1220 Frère

Insufficient Granularity of Access Control

This vulnerability occurs when a system's access controls are too broad, allowing unauthorized users or processes to read or modify…

CWE-1224 Frère

Improper Restriction of Write-Once Bit Fields

This vulnerability occurs when hardware write-once protection mechanisms, often called 'sticky bits,' are incorrectly implemented,…

CWE-1231 Frère

Improper Prevention of Lock Bit Modification

This vulnerability occurs when hardware or firmware uses a lock bit to protect critical system registers or memory regions, but fails to…

CWE-1233 Frère

Security-Sensitive Hardware Controls with Missing Lock Bit Protection

This vulnerability occurs when a hardware device uses a lock bit to protect critical configuration registers, but the lock fails to…

CWE-1252 Frère

CPU Hardware Not Configured to Support Exclusivity of Write and Execute Operations

This vulnerability occurs when a CPU's hardware is not set up to enforce a strict separation between writing data to memory and executing…

CWE-1257 Frère

Improper Access Control Applied to Mirrored or Aliased Memory Regions

This vulnerability occurs when a hardware design maps the same physical memory to multiple addresses (aliasing or mirroring) but fails to…

CWE-1259 Frère

Improper Restriction of Security Token Assignment

This vulnerability occurs when a System-on-a-Chip (SoC) fails to properly secure its Security Token mechanism. These tokens control which…

Ressources

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