CWE-1209 Base Incompleto

Failure to Disable Reserved Bits

This vulnerability occurs when reserved bits in a hardware design are left active in production. Designers sometimes use these bits for debugging or future features, but if not disabled, attackers…

Definição

What is CWE-1209?

This vulnerability occurs when reserved bits in a hardware design are left active in production. Designers sometimes use these bits for debugging or future features, but if not disabled, attackers can manipulate them to compromise the hardware's state.

Reserved bits are placeholders in a hardware design intended for future use and should have no functional purpose in the current version. However, to accelerate development or testing, designers might secretly enable logic connected to these bits for debugging or to prototype new features. Leaving this logic active creates a hidden backdoor that attackers can discover and exploit. When these bits remain enabled in production hardware, an adversary with access can write to them to trigger this hidden logic. This allows them to bypass security controls, alter configurations, or force the hardware into unsupported and potentially harmful states that were never intended for the released product.

Impacto no mundo real

Real-world CVEs caused by CWE-1209

Ainda não há referências CVE públicas associadas a este CWE no catálogo da MITRE.

Como os atacantes a exploram

Trajeto do atacante passo a passo

1
Identificar um caminho de código que trata input não confiável sem validação.
2
Criar um payload que explora o comportamento inseguro — injeção, traversal, overflow ou abuso de lógica.
3
Entregar o payload através de um pedido normal e observar a reação da aplicação.
4
Iterar até que a resposta exponha dados, execute código do atacante ou escale privilégios.

Exemplo de código vulnerável

Vulnerable Verilog

Assume a hardware Intellectual Property (IP) has address space 0x0-0x0F for its configuration registers, with the last one labeled reserved (i.e. 0x0F). Therefore inside the Finite State Machine (FSM), the code is as follows:

Vulnerável Verilog

reg gpio_out = 0; //gpio should remain low for normal operation

 case (register_address)

```
   4'b1111 : //0x0F
  	 begin
  		 gpio_out = 1;
  	 end

Exemplo de código seguro

Secure Verilog

An adversary may perform writes to reserved address space in hopes of changing the behavior of the hardware. In the code above, the GPIO pin should remain low for normal operation. However, it can be asserted by accessing the reserved address space (0x0F). This may be a concern if the GPIO state is being used as an indicator of health (e.g. if asserted the hardware may respond by shutting down or resetting the system, which may not be the correct action the system should perform). In the code below, the condition "register_address = 0X0F" is commented out, and a default is provided that will catch any values of register_address not explicitly accounted for and take no action with regards to gpio_out. This means that an attacker who is able to write 0X0F to register_address will not enable any undocumented "features" in the process.

Seguro Verilog

reg gpio_out = 0; //gpio should remain low for normal operation

 case (register_address)

```
   //4'b1111 : //0x0F
   default: gpio_out = gpio_out;

What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.

Lista de verificação de prevenção

How to prevent CWE-1209

Architecture and Design / Implementation Include a feature to disable reserved bits.
Integration Any writes to these reserve bits are blocked (e.g., ignored, access-protected, etc.), or an exception can be asserted.

Sinais de deteção

How to detect CWE-1209

SAST High

Executar análise estática (SAST) na base de código à procura do padrão inseguro no fluxo de dados.

DAST Moderate

Executar testes dinâmicos de segurança de aplicações (DAST) contra o endpoint em execução.

Runtime Moderate

Monitorizar os registos em tempo de execução para traços de exceção invulgares, input malformado ou tentativas de contornar a autorização.

Code review Moderate

Revisão de código: sinalizar qualquer novo código que trate input desta superfície sem usar os ajudantes validados do framework.

Correção automática do Plexicus

O Plexicus deteta automaticamente o CWE-1209 e abre um PR de correção em menos de 60 segundos.

O Codex Remedium analisa cada commit, identifica esta fraqueza exata e entrega um pull request pronto para revisão com o patch. Sem tickets. Sem transferências.

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Perguntas frequentes

Frequently asked questions

O que é o CWE-1209?

Qual a gravidade do CWE-1209?

A MITRE não publicou uma classificação de probabilidade de exploração para esta fraqueza. Trate-a como impacto médio até o seu modelo de ameaças provar o contrário.

Que linguagens ou plataformas são afetadas pelo CWE-1209?

MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, System on Chip.

Como posso prevenir o CWE-1209?

Include a feature to disable reserved bits. Any writes to these reserve bits are blocked (e.g., ignored, access-protected, etc.), or an exception can be asserted.

Como é que o Plexicus deteta e corrige o CWE-1209?

O motor SAST do Plexicus correlaciona a assinatura de fluxo de dados do CWE-1209 em cada commit. Quando é encontrada uma correspondência, o nosso agente Codex Remedium abre um PR de correção com o código corrigido, testes e um resumo de uma linha para o revisor.

Onde posso saber mais sobre o CWE-1209?

A MITRE publica a definição canónica em https://cwe.mitre.org/data/definitions/1209.html. Pode também consultar a documentação da OWASP e do NIST para orientações adjacentes.

Fraquezas relacionadas

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Recursos

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