CWE-1233 Base Estable

Security-Sensitive Hardware Controls with Missing Lock Bit Protection

This vulnerability occurs when a hardware device uses a lock bit to protect critical configuration registers, but the lock fails to prevent writes to all registers that can alter the protected…

Definición

What is CWE-1233?

This vulnerability occurs when a hardware device uses a lock bit to protect critical configuration registers, but the lock fails to prevent writes to all registers that can alter the protected system settings. Essentially, the security mechanism is incomplete, allowing software to bypass it and modify sensitive hardware configurations.
Many integrated circuits and hardware IPs contain configuration controls that are set by trusted firmware, like a BIOS or bootloader, immediately after a device powers on. To prevent later tampering, a trusted lock bit is often used to permanently disable writes to a specific set of protected registers. The expectation is that once this lock is engaged, the critical hardware configuration—such as memory or security unit settings—is frozen and cannot be changed. However, if this lock bit does not effectively write-protect every single register or control that can influence the protected configuration, the security model breaks. An attacker with software access can then locate and manipulate these unprotected controls to alter the hardware's secure state, potentially undermining system integrity and bypassing intended security boundaries.
Impacto en el mundo real

Real-world CVEs caused by CWE-1233

  • Certain servers leave a write protection lock bit unset after boot, potentially allowing modification of parts of flash memory.

  • Chain: chipset has a race condition (CWE-362) between when an interrupt handler detects an attempt to write-enable the BIOS (in violation of the lock bit), and when the handler resets the write-enable bit back to 0, allowing attackers to issue BIOS writes during the timing window [REF-1237].

Cómo lo explotan los atacantes

Ruta del atacante paso a paso

  1. 1

    Identifica una ruta de código que maneje entrada no confiable sin validación.

  2. 2

    Crea un payload que ejercite el comportamiento inseguro — inyección, traversal, overflow o abuso de lógica.

  3. 3

    Envía el payload a través de una solicitud normal y observa la reacción de la aplicación.

  4. 4

    Itera hasta que la respuesta filtre datos, ejecute código del atacante o escale privilegios.

Ejemplo de código vulnerable

Vulnerable Other

Consider the example design below for a digital thermal sensor that detects overheating of the silicon and triggers system shutdown. The system critical temperature limit (CRITICAL_TEMP_LIMIT) and thermal sensor calibration (TEMP_SENSOR_CALIB) data have to be programmed by the firmware.

Vulnerable Other
| Register | Field description | 
| --- | --- |
| CRITICAL_TEMP_LIMIT  | [31:8] Reserved field; Read only; Default 0  [7:0] Critical temp 0-255 Centigrade; Read-write-lock; Default 125  |
| TEMP_SENSOR_CALIB  | [31:0] Thermal sensor calibration data. A slope value used to map sensor reading to a degree Centigrade. Read-write; Default 25   |
| TEMP_SENSOR_LOCK  | [31:1] Reserved field; Read only; Default 0  [0] Lock bit, locks CRITICAL_TEMP_LIMIT register; Write-1-once; Default 0  |
| TEMP_HW_SHUTDOWN  | [31:2] Reserved field; Read only; Default 0  [1] Enable hardware shutdown on a critical temperature detection; Read-write; Default 0  |
| CURRENT_TEMP  | [31:8] Reserved field; Read only; Default 0  [7:0] Current Temp 0-255 Centigrade; Read-only; Default 0  |
Ejemplo de código seguro

Secure Other

In this example note that only the CRITICAL_TEMP_LIMIT register is protected by the TEMP_SENSOR_LOCK bit, while the security design intent is to protect any modification of the critical temperature detection and response. The response of the system, if the system heats to a critical temperature, is controlled by TEMP_HW_SHUTDOWN bit [1], which is not lockable. Also, the TEMP_SENSOR_CALIB register is not protected by the lock bit. By modifying the temperature sensor calibration, the conversion of the sensor data to a degree centigrade can be changed, such that the current temperature will never be detected to exceed critical temperature value programmed by the protected lock. Similarly, by modifying the TEMP_HW_SHUTDOWN.Enable bit, the system response detection of the current temperature exceeding critical temperature can be disabled.

Seguro Other
Change TEMP_HW_SHUTDOWN and TEMP_SENSOR_CALIB controls to be locked by TEMP_SENSOR_LOCK. 

|  | 
|
| TEMP_SENSOR_CALIB  | [31:0] Thermal sensor calibration data. A slope value used to map sensor reading to a degree Centigrade. Read-write-Lock; Default 25; Locked by TEMP_SENSOR_LOCK bit[0]   |
| TEMP_HW_SHUTDOWN  | [31:2] Reserved field; Read only; Default 0  [1] Enable hardware shutdown on critical temperature detection; Read-write-Lock; Default 0; Locked by TEMP_SENSOR_LOCK bit[0]  |
What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.
Lista de prevención

How to prevent CWE-1233

  • Architecture and Design / Implementation / Testing - Security lock bit protections must be reviewed for design inconsistency and common weaknesses. - Security lock programming flow and lock properties must be tested in pre-silicon and post-silicon testing.
Señales de detección

How to detect CWE-1233

Manual Analysis High

Set the lock bit. Attempt to modify the information protected by the lock bit. If the information is changed, implement a design fix. Retest. Also, attempt to indirectly clear the lock bit or bypass it.

Auto-corrección de Plexicus

Plexicus detecta automáticamente CWE-1233 y abre un PR de corrección en menos de 60 segundos.

Codex Remedium escanea cada commit, identifica esta debilidad concreta y entrega un pull request listo para revisión con el parche. Sin tickets. Sin traspasos.

Preguntas frecuentes

Frequently asked questions

¿Qué es CWE-1233?

This vulnerability occurs when a hardware device uses a lock bit to protect critical configuration registers, but the lock fails to prevent writes to all registers that can alter the protected system settings. Essentially, the security mechanism is incomplete, allowing software to bypass it and modify sensitive hardware configurations.

¿Qué gravedad tiene CWE-1233?

MITRE no ha publicado una calificación de probabilidad de explotación para esta debilidad. Trátala como de impacto medio hasta que tu modelo de amenazas demuestre lo contrario.

¿Qué lenguajes o plataformas se ven afectados por CWE-1233?

MITRE lists the following affected platforms: Not OS-Specific, Not Architecture-Specific, Not Technology-Specific.

¿Cómo puedo prevenir CWE-1233?

- Security lock bit protections must be reviewed for design inconsistency and common weaknesses. - Security lock programming flow and lock properties must be tested in pre-silicon and post-silicon testing.

¿Cómo detecta y corrige Plexicus CWE-1233?

El motor SAST de Plexicus detecta la firma de flujo de datos para CWE-1233 en cada commit. Cuando hay coincidencia, nuestro agente Codex Remedium abre un PR de corrección con el código corregido, las pruebas y un resumen de una línea para el revisor.

¿Dónde puedo aprender más sobre CWE-1233?

MITRE publica la definición canónica en https://cwe.mitre.org/data/definitions/1233.html. También puedes consultar la documentación de OWASP y NIST para guías relacionadas.

Debilidades relacionadas

Weaknesses related to CWE-1233

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CWE-1224 Hermano

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CWE-1231 Hermano

Improper Prevention of Lock Bit Modification

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CWE-1252 Hermano

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CWE-1257 Hermano

Improper Access Control Applied to Mirrored or Aliased Memory Regions

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CWE-1259 Hermano

Improper Restriction of Security Token Assignment

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CWE-1260 Hermano

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